This invention relates to a voltage-current regulator of the switching-mode class. Generally, switching-mode regulators have the advantage of higher efficiency than series-pass or other similar regulators that use a variable power-absorbing element.
In my earlier U.S. Pat. No. 3,737,758 issued on June 5, 1973 and entitled Switching-Mode Voltage and Current Regulator, there is disclosed a regulated power supply providing a high voltage output and wherein the switching-mode regulator is a bi-directional switching element operated at a relatively low voltage. The alternating current voltage output from the switching element and an associated power transformer is applied to a rectifying voltage multiplier, i.e., a voltage quadrupler. The utilization of a voltage multiplier has the advantage of producing better stability than a non-multiplying rectifier.
This is due to the fact that in a non-multiplying rectifier the current flows through the switching means in sudden, full-current bursts and such sudden bursts of power in the feedback circuit deteriorates its stability. When a voltage multiplier is coupled to a switching-mode regulator, this stability s improved as it takes two or more halves of an alternating current half cycle for the output of switching-mode regulator and voltage multiplier combination to build up to full power. Particularly, in the voltage quadrupler illustrated in the above-mentioned patent, three halves of an alternating current half cycle are required. This is because each half cycle charges some, but not all, of the capacitors in the voltage multiplier circuit and three half cycles are required to charge all of the capacitors. The result is that the use of the voltage multiplier provides a more smooth and gradual modulation of power.
Heretofore, there has been encountered the necessity of changing the voltage quadrupler to a voltage hextupler and eliminating the post regulator transistor shown in U.S. Pat. No. 3,737,758 in order to obtain a higher output voltage and to improve the efficiency of the power supply by eliminating the most significant power-absorbing element. However, it was discovered that along with this increased output voltage there existed a new type of instability due to an unbalanced potential on the capacitors of the voltage multiplier thereby imposing a dc off-set potential onto the switching element.
This type of instability can be best understood by reference to FIGS. 1, 2, 3 and 4 of the drawings. A switching-mode power supply operating in a stable condition at a low output load level operates with an amplitude-timing graph shown in FIG. 1. A sinusoidal voltage designated by V.sub.AK and impressed between the anode and cathode of the switching element 2(FIG. 4) is shown with the switching element in the non-conducting state. Gating or triggering pulses appear regularly during each half cycle at successively repeating points "A" and "B". These "A" and "B" trigger pulses at the gate 4 of the switching element 2 gate or trigger it into conduction near the end of each alternating current half cycle. The instability results if the power supply, setting at a relatively low output level, is suddenly disturbed such as by initially turning on the power supply into operation after it has been off for a period of time. Under such circumstances, capacitors C.sub.1 through C.sub.6 in voltage multiplier 6 of FIG. 4 will all initially be completely discharged. For example, assume at initial turn-on the timing of the first trigger pulse to the switching element occurs such that the trigger pulse is near the start of a positive alternating current half cycle. If this happens the following sequence of events will take place:
1. A positive pulse from the switching element 2 charges capacitors C.sub.3 and C.sub.6 to a sudden high voltage, which is greater than the normal set point or operating voltage. Capacitors C.sub.1 and C.sub.2 do not charge because the voltage on capacitor C.sub.3 opposes their charging.
2. The voltage on capacitor C.sub.6 is reflected back to the switching element 2, thereby throwing a negative dc off-set voltage on its anode. A conduction path is available from capacitor C.sub.6 through diode D.sub.8 and through capacitors C.sub.4 and C.sub.5 which are not charged. During this initial turn-on transient, a similar negative voltage is reflected onto the anode of the switching element 2 from the charge on capacitor C.sub.3 through a conduction path via diode D.sub.2 and the uncharged capacitor C.sub.1.
3. Capacitor C.sub.3 partially discharges through an external load (not shown) connected across output terminals 7 and 8 with a conduction path through diodes D.sub.2, D.sub.1, D.sub.8, D.sub.7 and D.sub.5. Capacitor C.sub.6 also partially discharges through the load with a conduction path via diodes D.sub.3, D.sub.2, D.sub.1 and D.sub.8. The external load is not shown in FIG. 4, but may be any conventional power-consuming element that the power supply is servicing. When the output over voltage decreases to the set point level that is maintained by conventional negative-feedback circuitry (not shown), triggering or gating pulses appearing at points "A" and "B" (FIG. 1) near the end of each alternating current half cycle in the conventional way will tend to stabilize the output voltage of the power supply at the desired level. Conventionally, these trigger pulses are timed so that they occur just before the "0.degree. and 180.degree." of the sinusoidal ac wave-form of the voltage between the anode and cathode of the switching element 2. If the instability in question did not exist, these trigger pulses would be proper to initiate conduction of the switching element 2 near the end of each half cycle thereby maintaining the output voltage of the power supply at the desired level.
4. However, due to the previously mentioned dc off-set voltage on the switching element 2 reflected from the voltage on capacitor C.sub.6 through the conduction path of diode D.sub.8 and uncharged capacitors C.sub.5 and C.sub.4, the trigger pulses will not occur at the end of each positive half cycle, but will instead occur just after the start of the following negative half cycle. This result is illustrated by reference to FIG. 2. A trigger pulse at point "A" causes the switching element 2 to conduct for over one-half of the negative half cycle instead of conducting for a small portion of the positive half cycle.
5. The resulting large negative pulse charges capacitors C.sub.1 and C.sub.4 to a sudden high voltage, which is greater than the normal operating voltage. Capacitor C.sub.5 does not charge because its charging is opposed by the voltage on capacitor C.sub.4. The charging current through capacitor C.sub.1 flows through diode D.sub.2 and overwhelms the charge remaining on capacitor C.sub.3 thus completely discharging capacitor C.sub.3. The excess current is by-passed by diode D.sub.4. The charge on capacitor C.sub.3 is overhwhelmed because its charge remaining, at the time just before the large negative pulse, had decreased from its initial value due the partial discharge through the external load.
6. The voltage on capacitor C.sub.1 is reflected back to the switching element through diode D.sub.1 and uncharged capacitors C.sub.2 and C.sub.3, thereby throwing a positive dc off-set voltage on the anode of the switching element 2.
7. Capacitors C.sub.4 and C.sub.1 will discharge partially through their respective diodes coupling them to the external load.
8. Thereafter, the switching element 2 is triggered into conduction at the start of a positive half cycle by a trigger pulse at point "B" (FIG. 3) because of the off-set voltage impressed upon it by the voltage on capacitor C.sub.1 through diode D.sub.1 and uncharged capacitors C.sub.3 and C.sub.2.
9. The resulting large positive pulse charges again capacitors C.sub.3 and C.sub.6 to a sudden high voltage. Capacitor C.sub.2 does not charge because its charging is opposed by the voltage on capacitor C.sub.3. The charging current through capacitor C.sub.6 flows through diode D.sub.7 and overwhelms the charge remaining on capacitor C.sub.4, thereby completely discharging capacitor C.sub.4. The excess current is by-passed by diode D.sub.5.
10. Once again, the negative off-set voltage is reflected to the anode of the switching element 2 from the voltage on capacitor C.sub.6 with a conduction path through diode D.sub.8 and uncharged capacitors C.sub.4 and C.sub.5.
11. This cycle of instability now continues repeatedly and indefinitely.
In a regulated power supply made in accordance with this invention, the effect of the voltage imbalance on the capacitors is removed. This is accomplished by the provision of a dc short circuit path, such as the addition of inductor 124 shown in phantom to the circuit of FIG. 4, or modifying the timing of the gating or trigger pulses at the gate 4 of of the switching element 2 in accordance with the sign and magnitude of the unbalanced voltage on the capacitors so that triggering or gating of the switching element 2 is prevented from occurring at the conventional, normal times. The gating pulses are advanced and/or retarded so that they occur at times relative to the actual instantaneous sum of the ac supply voltage and the dc off-set voltage on the switching element 2. Thus, the switching element is not falsely gated or triggered into conduction at the beginning of a half cycle of alternating current.